1. Field of the Invention
The invention relates to a recording and reproducing apparatus of a digital video signal and, more particularly, to a digital VTR using rotary heads and a magnetic tape.
2. Description of the Prior Art
In a conventional analog VTR, a pair of magnetic heads are attached to a rotary drum at an angular interval of 180.degree. and a magnetic tape is wrapped around the peripheral surface of a drum in a range of about 180.degree.. The magnetic tape is fed at a predetermined speed. The magnetic heads alternately scan on the magnetic tape, so that a video signal is recorded as an oblique track. Since the wrap angle of the tape is set to about 180.degree. as mentioned above, periods during which the magnetic heads scan on the tape don't overlap with respect to time. Therefore, it is sufficient to provide one system of recording and reproducing circuits and the circuit scale doesn't increase.
In a digital VTR for recording and reproducing a video signal in a form of the digital signal, the amount of data represented by the digital video signal is large. Therefore, a multichannel method of simultaneously forming a plurality of tracks by one scan of the magnetic head is generally used. With respect to the digital VTR, the case where tape wrap angle is set to 180.degree. and the case where it is set to 270.degree. will now be compared and examined. As an example, the case where data of 600 Mbps is recorded by the magnetic heads of total eight channels in which the magnetic heads of four channels face the other heads of the other four channels will now be considred. Each parameter in the above case can be calculated as follows.
______________________________________ Drum rotational speed 150 rotations/sec ______________________________________ Tape wrap angle 180.degree. 270.degree. Recording 150 Mbps 100 Mbps rate/CH Relative speed 52.5 m 35 m Drum diameter 111.5 mm 74.3 mm ______________________________________
When the wrap angle is increased as mentioned above, the drum diameter can be reduced. Accordingly, not only the size and weight of the apparatus can be reduced but also spacing loss can be reduced and the tape damage can be decreased because of decrease in relative speed. Moreover, movable heads can be easily installed due to decrease in centrifugal force. Further, since the recording data rate is lowered, efficiencies of the rotary transformer and magnetic heads rise and it is advantageous from the viewpoint of a high density recording. The conventional digital VTR in which a wrap angle is set to 270.degree. will now be described. FIG. 1 shows a circuit construction for recording. A luminance signal Y and color difference signals PB and PR as components of a color video signal are converted into digital signals by A/D converters 1, 2, and 3. A sampling clock CK.sub.1 which is supplied to the A/D converter 1 has a frequency F.sub.s of, for instance, 37.5 MHz. A frequency of sampling clock which is supplied to the A/D converters 2 and 3 is set to 1/2 of F.sub.s. Therefore, the data amount of the digital color difference signals from the A/D converters 2 and 3 is the half of that of the luminance signal. A sampling rate of the total data of the digital data from the A/D converters 1, 2, and 3 is equal to 2 F.sub.s.
Output signals of the A/D converters 1 to 3 are supplied to a head interleave circuit 4. As shown in FIG. 2, eight magnetic heads 14A to 14H are attached to a drum 13 which rotates at 150 Hz (which is five times as high as a frame frequency). A magnetic tape 15 is obliquely wrapped around the peripheral surface of the drum 13 at a wrap angle .theta. (for example, .theta.=270.degree.). The magnetic heads 14A, 14B, 14C, and 14D are closely arranged. Four tracks are simultaneously formed on the magnetic tape 15 by the four magnetic heads. The four magnetic heads 14E to 14H are closely attached to the drum 13 so as to have an angular interval at 180.degree. from the magnetic heads 14A to 14D. Four tracks are simultaneously formed on the magnetic tape 15 by the magnetic heads 14E to 14H. Although not shown, the magnetic tape 15 is fed at a predetermined speed by a tape feeding mechanism.
To form data which is recorded by each magnetic head, the head interleave circuit 4 in FIG. 1 distributes the digital component signal to signals of eight channels of "A" to "H". In FIG. 3, as shown in S1, output signals of the head interleave circuit 4 are parallel data of eight channels. A sampling frequency of each channel is set to (2 F.sub.s /8=1/4 F.sub.s). The signal of the channel "A" is supplied to an encoder 5 of an outer code. As a countermeasure for errors which occur during the recording and reproducing processes, the data is error correction encoded by both of an outer code and an inner code. More practically speaking, the encoding of the outer code is executed with respect to the vertical direction of a matrix-like array of the data of a predetermined amount. The encoding of the inner code is executed with respect to the lateral direction of such a data array every sync block.
Output data of the encoder 5 is supplied to a shuffling circuit 6. The shuffling circuit 6 executes a shuffling to rearrange the data of one channel in one field to an order different from the original order and is constructed by a memory. The shuffling prevents that the data which is continuous with respect to time becomes an error in a lump due to a burst error, thereby enabling a good error concealment to be performed. A write clock CKW and a read clock CKR are supplied to the shuffling circuit 6. A desired shuffling is performed by an address control of the memory. Further, a frequency of clock CKW is set to 1/4 F.sub.s and a frequency of clock CKR is set to 1/3 F.sub.s. Consequently, output data of the shuffling circuit 6 is time-base compressed to 3/4 of the input data. Further, the reading timing of the data from the shuffling circuit 6 is made to coincide with a phase at which the corresponding magnetic head of the channel "A" records the data onto the magnetic tape.
The output signal of the shuffling circuit 6 is supplied to an ID adding circuit 7 and an ID signal for control is added. An output signal of the ID adding circuit 7 is supplied to an inner code encoder 8 and the encoding of the inner code is executed. An output signal of the inner code encoder 8 is supplied to a sync adding circuit 9. Recording data is partitioned by a sync block. Video data in the sync block, a parity of an error correction code, and the ID signal are encoded by the inner code. Recording data of a structure of the sync block is generated from the sync adding circuit 9 and the recording data is supplied to a channel encoder 10. The channel encoder 10 executes a channel encoding to reduce a DC component. An output signal of the channel encoder 10 is supplied to a parallel/serial converting circuit 11. Serial recording data is supplied from the parallel/serial converting circuit 11. The recording data is supplied to the magnetic head 14A through a recording amplifier (not shown).
A circuit construction regarding the channel "A" from the outer code encoder 5 to the parallel/serial converting circuit 11 as mentioned above is provided with respect to the other channels of "B" to "H" as shown in blocks 12B to 12H of broken lines. The recording data from the blocks 12B to 12H is supplied to the magnetic heads 14B to 14H through recording amplifiers, respectively. The time-base compression is executed by the shuffling circuit 6 and the shuffling circuits in the circuit blocks 12B to 12H and the timing for reading out the data from the memory is made coincident with the recording phase of the corresponding magnetic head. Therefore, as outputs of the shuffling circuit 6 and the shuffling circuits of the circuit blocks 12B, 12C, and 12D, data S2 in FIG. 3 is generated. As outputs of the shuffling circuits of the circuit blocks 12E, 12F, 12G, and 12H, data S3 in FIG. 3 is generated.
In FIG. 3, T denotes a period (=1/150 second) of one rotation of the drum 13 and the wrap angle .theta. (FIG. 2) is set to 270.degree.. Therefore, the recording data of the channels "A" to "D" is recorded as four tracks for a period of time when the magnetic heads 14A to 14D scan the magnetic tape 15. The recording data of the channels "E" to "H" is subsequently recorded as four tracks for a period of time when the magnetic heads 14E to 14H scan the magnetic tape 15 with a delay time of 1/2 T.
A conventional reproducing circuit to reproduce the data recorded as mentioned above will now be described with reference to FIG. 4. The reproduction data of the channels "A" to "H" is supplied to decoders (not shown) of channel codes through reproducing amplifiers by the magnetic heads 14A to 14H. The reproduction data of the channel A from the decoder of the channel code is supplied to a PLL 21. The PLL 21 extracts clocks necessary for a process of the reproducing circuit from the reproduction data. An output signal of the PLL 21 is supplied to a serial/parallel converting circuit 22. An output signal of the serial/parallel converting circuit 22 is supplied to a TBC (time base compensator) 23 and a time base fluctuation component in the reproduction data is eliminated.
An output signal of the TBC 23 is supplied to an inner code decoder 24 and an error correction by an inner code is executed. An output signal of the decoder 24 is supplied to a deshuffling circuit 25. The deshuffling circuit 25 is constructed by a memory. The write clock CKW and read clock CKR are supplied to the deshuffling circuit 25. A frequency of the clock CKW is set to 1/3 F.sub.s, which is equal to the clock rate of the reproduction data. A frequency of the clock CKR is set to 1/4 F.sub.s. By the address control, the deshuffling circuit 25 executes a process to return the shuffling in the recording mode to the original arrangement. In addition to such a process, the deshuffling circuit executes a time base expanding process according to a frequency ratio of the clocks. Further, since the read-out phases of the channels "A" to "D" are controlled, parallel data of eight channels is formed.
An output signal of the deshuffling circuit 25 is supplied to an outer code decoder 26, by which an error correcting process by an outer code is executed. An output signal of the outer code decoder 26 is supplied to a head deinterleave error concealment circuit 28. In the circuit 28, the data of eight channels is separated into a luminance signal and two color difference signals and errors which cannot be corrected by the inner code and outer code are corrected. D/A converters 29, 30, and 31 are connected to the circuit 28. The digital luminance signal is converted into the analog luminance signal Y by the D/A converter 29. The digital color difference signals are converted into the color difference signals PB and PR by the D/A converters 30 and 31, respectively.
The same construction as that of the reproducing circuit from the PLL 21 to the outer code decoder 26 with respect to the channel "A" mentioned above is provided with regard to each of the other channels "B" to "H" as shown in blocks 27B to 27H of broken lines in FIG. 4. As output of the serial/parallel converting circuit 22 and serial/parallel converting circuit in the circuit blocks 27B to 27H, reproduction data indicated by S4 in FIG. 5 is generated. The reproduction data S4 corresponds to the reproducing phase of the magnetic head. As an output of the outer code decoder 26 and outputs of outer code decoders in the circuit blocks 27B to 27H, parallel reproduction data of eight channels of "A" to "H" as shown by S5 in FIG. 5 is generated.
In the above digital VTR, the wrap angle .theta. of the magnetic tape 15 is set to 270.degree. (larger than 180.degree.). In the digital VTR, in the case where a recording wavelength is constant and a drum rotational speed and the number of recording heads are specified, by increasing .theta. to a value larger than 180.degree., a diameter of the drum 13 can be reduced or a length of track can be increased and a recording frequency can be reduced. However, an interval during which the scans of the magnetic heads overlap occurs. As shown in FIG. 1 or 4, consequently, there is the problem that it is necessary to provide in parallel a number of signal processing systems which is equal to the number of magnetic heads (channels) thereby enlarging the scale of the recording circuit and the reproducing circuit.